ZCU102 CDMA with BRAM

1. H/W 디자인 
1. ZCU102 Re-customize IP 설정
1. PS-PL Configuration 
1. PS-PL Interface 
1. Master Interface 
1. AXI HPM0 FPD : Checked  
1. AXI HPM0 FPD Data Width : 32
2. AXI HPM1 FPD : Checked 
1. AXI HPM0 FPD Data Width : 128 
3. AXI HPM0 LPD : Checked
1. AXI HPM0 FPD Data Width : 32 
2. Slave Interface
1. AXI HP
1. AXI HPC0 FPD : Checked
1. AXI HPC0 FPD Data Width : 128
2. CDMA IP 코어 추가 
1. Write/Read Data Width : 128
2. Write/Read Burst Size : 4
3. Address Width : 32
4. 연결
1. S_AXI_LITE ----> Zynq AXI HPM0 LPD
2. M_AXI ----> Zynq AXI HPC0 FPD
3. AXI BRAM Controller IP 코어 추가 
1. AXI Protocol : AXI4
2. Data Width : 128
3. Number of BRAM interface : 1
4. Enable ECC : No
4. Block Memory Genterator IP 코더 추가
1. Basic
1. Mode : BRAM Controller
2. Memory Type : True Dual Port RAM
2. Other Options
1. Enable Safety Circuit : UnChecked
5. ㅇㅇ